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Computer Organisation & Architecture (COA) · Lesson 8 of 8 · Updated ·

COA Numericals Practice — 10 Solved Exam Problems on Cache, Pipelining, IEEE 754, Addressing and Disks

COA exams reward a small set of formulas applied carefully. This lesson is a revision set: ten typical questions, each solved by hand and checked in Python. Try each one yourself before reading the solution.

The formula sheet

COA formula sheet: addressable memory 2 to the n, two's complement range, IEEE 754 single precision layout, AMAT, cache address split into tag index offset, pipeline time and speedup, CPI with stalls, CPU time, and disk access time

Problems 1–5

1. Memory size. A byte-addressable memory has 24 address lines. Size? → 2²⁴ bytes = 16 MB.

2. 2's complement. What decimal value does the 8-bit pattern 1010 1100 represent? → MSB weight −128: −128 + 32 + 8 + 4 = −84.

3. IEEE 754. What is the single-precision hex for +12.5? → 12.5 = 1100.1₂ = 1.1001 × 2³ → sign 0, exponent 3+127 = 130 = 10000010, fraction 1001 000… → 0x41480000.

4. Instruction format. 32-bit instructions, 128 registers, three register operands. Bits left for the opcode? → log₂128 = 7 bits × 3 = 21 → 32 − 21 = 11 bits (2048 opcodes).

5. AMAT (two-level). L1 hit time 1 ns, L1 miss rate 10%, L2 hit time 8 ns, L2 local miss rate 25%, memory 120 ns. → 1 + 0.10 × (8 + 0.25 × 120) = 1 + 0.1 × 38 = 4.8 ns.

import struct

print("1:", 2 ** 24 // 2 ** 20, "MB")
b = "10101100"
print("2:", int(b, 2) - 256 if b[0] == "1" else int(b, 2))
print("3:", hex(struct.unpack(">I", struct.pack(">f", 12.5))[0]))
print("4:", 32 - 3 * 7, "opcode bits")
print("5:", round(1 + 0.10 * (8 + 0.25 * 120), 2), "ns")
1: 16 MB
2: -84
3: 0x41480000
4: 11 opcode bits
5: 4.8 ns

Problems 6–10

6. Cache bits. 32-bit addresses, 256 KB 8-way set-associative cache, 32-byte blocks. Tag, index, offset? → lines = 256 KB / 32 B = 8192; sets = 8192 / 8 = 1024 → index 10 bits; offset log₂32 = 5; tag = 32 − 10 − 5 = 17 | 10 | 5.

7. Set mapping. In a 2-way set-associative cache with 16 lines, which set does main-memory block 45 go to? → sets = 8 → 45 mod 8 = set 5.

8. Pipeline speedup. A 6-stage pipeline, 1 ns per stage, executes 500 instructions without stalls. Time and speedup? → (6 + 500 − 1) × 1 = 505 ns; non-pipelined 500 × 6 = 3000 ns → speedup 5.94.

9. Effective CPI. 25% of instructions are branches; 40% of branches are taken and each taken branch costs 3 stall cycles (predict not-taken). CPI? → 1 + 0.25 × 0.40 × 3 = 1.30.

10. Disk access. 10,000 RPM disk, 3 ms average seek, 200 MB/s transfer, read 8 KB (8192 bytes). Access time? → rotation = ½ × 60/10000 s = 3 ms; transfer = 8192 / 200,000,000 s ≈ 0.041 ms → ≈ 6.04 ms.

import math

addr, cache, block, ways = 32, 256 * 1024, 32, 8
sets = cache // block // ways
off, idx = int(math.log2(block)), int(math.log2(sets))
print("6: tag|index|offset =", addr - idx - off, idx, off)
print("7: set", 45 % (16 // 2))
k, n = 6, 500
print("8:", k + n - 1, "ns, speedup", round(n * k / (k + n - 1), 2))
print("9: CPI", round(1 + 0.25 * 0.40 * 3, 2))
print("10:", round(3 + 0.5 * 60 / 10000 * 1000 + 8192 / 200e6 * 1000, 2), "ms")
6: tag|index|offset = 17 10 5
7: set 5
8: 505 ns, speedup 5.94
9: CPI 1.3
10: 6.04 ms

How to score full marks

  1. Write the formula first, then substitute — partial credit even if arithmetic slips.
  2. Units: convert everything (ns/µs/ms, KB = 2¹⁰ bytes in memory questions, but MB/s for transfer rates is usually 10⁶ — read the question).
  3. Powers of two: know 2¹⁰ = 1024 … 2²⁰ ≈ 1 M, 2³⁰ ≈ 1 G by heart.
  4. Read the model: hierarchical vs simultaneous AMAT, whether stalls include the first cycle, whether latch delay is given.
  5. Sanity-check: speedup can't exceed the number of stages; hit ratios are between 0 and 1; tag bits can't be negative.

Where COA meets real programming

  • Cache-friendly loops (row-major traversal, struct-of-arrays) can make code several times faster.
  • Integer overflow and float precision bugs are COA bugs in disguise.
  • Branch-heavy code in hot loops pays misprediction penalties — that's why sorted data sometimes processes faster.
  • Understanding DMA and interrupts helps with systems, embedded and OS work.

Quick recap

  • Memory: 2ⁿ locations; 2's complement MSB = −2ⁿ⁻¹; IEEE single = 1|8 (bias 127)|23.
  • AMAT = hit + miss rate × penalty (nest for levels); address = tag | index | offset.
  • Pipeline: (k + n − 1) cycles, speedup nk/(k+n−1); CPI = 1 + stalls/instruction.
  • Disk: seek + ½ rotation + transfer.
  • Formula first, units carefully, sanity-check the answer.

Practice what you learned

📝 Quiz: COA Numericals5 questions · instant answers & explanations · +10 XP · counts towards your free certificateTake the quiz →