Computer Organisation & Architecture (COA)

How a computer really works inside: CPU, registers and the instruction cycle, number representation and IEEE 754, computer arithmetic (Booth's algorithm), instruction sets and addressing modes, memory hierarchy and cache mapping, pipelining and hazards, and I/O (interrupts, DMA) — with Python simulations and solved GATE/university-style numericals.

1. 01How a Computer Works — Von Neumann Architecture, CPU, Registers, Buses and the Instruction CycleThe big picture of COA: organisation vs architecture, the von Neumann model, what the ALU, control unit and registers (PC, IR, MAR, MDR, ACC) do, system buses, and the fetch-decode-execute cycle traced step by step with a tiny Python CPU.
2. 02Data Representation — Binary, Hex, Two's Complement, Overflow and IEEE 754 Floating PointHow numbers are stored in hardware: binary and hexadecimal conversion, signed numbers (sign-magnitude, 1's and 2's complement), ranges and overflow, and IEEE 754 single precision decoded bit by bit with Python — the exam favourites, solved.
3. 03Computer Arithmetic — Half and Full Adders, Ripple Carry vs Carry Look-Ahead, and Booth's MultiplicationHow hardware adds and multiplies: half and full adders built from logic gates, ripple-carry delay vs carry look-ahead, subtraction with 2's complement, and Booth's multiplication algorithm traced step by step and verified with a Python simulation.
4. 04Instruction Sets and Addressing Modes — Formats, Immediate to Indexed Addressing, RISC vs CISCHow instructions are encoded (opcode and operand fields, 0/1/2/3-address formats), every addressing mode with the effective-address formula and a Python simulation, instruction-format numericals, and RISC vs CISC with real examples.
5. 05Memory Hierarchy and Cache — Locality, Hit Ratio, AMAT and Direct, Associative and Set-Associative MappingWhy computers have registers, caches, RAM and disks, the locality principle, hit ratio and average memory access time, and cache mapping — splitting an address into tag, index and offset — with a working cache simulator in Python and solved numericals.
6. 06Pipelining — Stages, Speedup, Throughput and Hazards (Structural, Data, Control) with Solved NumericalsHow instruction pipelining overlaps fetch, decode, execute, memory and write-back, the speedup formula k·n/(k+n−1), pipeline timing with unequal stages, and the three hazard types with stalls, forwarding and branch prediction — numericals solved in Python.
7. 07I/O Organisation — Programmed I/O, Interrupts, DMA, Buses and Secondary Storage NumericalsHow the CPU talks to keyboards, disks and networks: programmed I/O (polling), interrupt-driven I/O, DMA and its modes, interrupt priority, memory-mapped vs isolated I/O, and disk access-time numericals solved step by step in Python.
8. 08COA Numericals Practice — 10 Solved Exam Problems on Cache, Pipelining, IEEE 754, Addressing and DisksA revision set of ten exam-style COA numericals — memory size, 2's complement, IEEE 754, instruction formats, AMAT, cache tag bits, set mapping, pipeline speedup, effective CPI and disk access — each solved step by step and verified in Python, plus a one-page formula sheet.